VSC7322 Datasheet | Vitesse Semiconductor

feature Serial CPU interface for register access Full RMON 1, IEEE802.3, and SNMP statistics ASIC/FPGA friendly CSIX-64 Interface Jumbo frame support Advanced test features including internal loop-back, frame collection, and replay CSIX-64 FPGA VSC 7322 10 x 1 G Application using the VSC7322 and a customer specific FPGA to create a gigabit switching line card 1 0 G b E T O G I G A B I T E T H E R N E T A G G R E G AT I O N : 10G Fiber O/E VSC 7320 CSIX-64 VSC 7322 10 x 1G . Chipset application using the VSC7320 and VSC7322 back-to-back to aggregate 10 x 1G into 10G Ethernet . Data Sheet 4 U . PB-VSC7322-002 .. Lansing™ - 10 x 1 Gigabit Ethernet MAC Chip GENERAL DESCRIPTION : Lansing™ is an advanced Ethernet MAC chip, allowing a system with a standard CSIX-64 host interface access to 10 trispeed (10/100/1000 Mbit/s) Ethernet ports. The 10 separate tri-speed MACs support both half-duplex and full duplex at 10/100 Mbit/s and full duplex at 1 Gbit/s. On-chip FIFOs capable of handling short-haul flow control are located between the Ethernet ports and the CSIX-64 interface. These FIFOs are also useful for smoothing bursty traffic on both the CSIX-64 and the Ethernet ports, and for pensating for the bursts generated when aggregating links. Lansing™ can be used together with Meigs-I™ in a flexible port aggregation or port trunking mode. The scheme can be based on MAC addresses or MPLS tags. A prehensive set of statistics counters supports the RMON 1, IEEE802.3, and SNMP standards. Test features include cyclic replay of frames at a user definable rate - either built by the external CPU...