WP3200 Datasheet | WavePlus

Features a at .D w w w Wave Plus Technology Co., Ltd. ?? ?? WP3200 integrated a high performance 32-bit processor core. The processor contains 4K Instruction cache, 2K Data cache and MMU with TLB; its operation frequency is user selectable 100/75MHz. The processor is support Little Endian Mode and EJTAG debug function. ?? ?? Two Integrated 10/100 Ethernet MACs and one 10M PHY There are 5 bus masters on the WP3200 including CPU, Ethernet 1, Ethernet 2, USB and Memory-to-Memory DMA 3 24-bit up counter Timers and supports Interval timer mode and Watchdog timer modes (only Timer 3) 2 sets of full duplex UARTs, one high speed up to 921K bps and one low speed up to 115.2K bps USB Device Controller Interface pliance with USB specification v1.1 Provide 16 bi-directional general-purpose I/O pins (shared with other function pins) Two internal PLLs use external 8MHz crystal or oscillator Non-stop 32.768k Hz clock to generate 1 Hz clock to provide real time clock and calendar function 160 pins QFP Package ?? Supports 16M/64M/128M bit SDRAM with 2/4-bank size availability, its operation frequency is the same as processor. 2 banks of Static Memory interfaces which can support Mask ROM, Page Mode ROM, EPROM, E2PROM, SRAM and NOR Flash (linear type) NAND Flash (block type) controller interfaces ?? ?? ?? Provide a 256-Byte hard-wired boot code that can choose booting from normal ROM, NAND Flash, UART or EJTAG debugger interface PCMCIA-like interface to support glue-less connected to WLAN 802.11b device ?? Figure 1 Block Diagrams 10/100Base T PHY 10/100Base T PHY WAN/LAN m o .c U 4 t e e h S a t a .D w w w ?? ?? ?? ?? ?? ?? EJTAG Controller On Chip PLLs 32bit-RISC 4K I-Cache 2K D-Cache INT Interrupt controller Bus Arbiter Controller Flash RAM Ethernet 10/100 MAC Memory Controller SDRAM 10Base T PHY Ethernet 10/100 MAC PCMCIA Controller ?? IEEE802.11b WLAN USB Interface USB Transceiver WP3200 Product Brief V1.55 2003/4/23 Page 1 of 1 m o .c U 4 t e e h S...