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WD2511 - LSI PACKET NETWORK INTERFACE

Download the WD2511 datasheet PDF. This datasheet also covers the WD2501 variant, as both devices belong to the same lsi packet network interface family and are provided as variant models within a single manufacturer datasheet.

General Description

The WD2501 is a MOS I LSI device which handles bit-oriented, full-duplex serial data communications with DMA, which conforms to CCITT X.25 with programmable enhancements.

The device is fabricated in N-Channel silicon gate MOS technology and is TTL compatible on all inputs and outputs.

Key Features

  • Packet Switching Controller Compatible with CCITI Recommendation X.2S, Level 2, LAP.
  • Programmable Primary Timer (T1) And Retransmission Counter (N2).
  • Programmable A-Field Which Provides A Wider Range Of.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (WD2501-WesternDigital.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number WD2511
Manufacturer Western Digital
File Size 1.14 MB
Description LSI PACKET NETWORK INTERFACE
Datasheet download datasheet WD2511 Datasheet

Full PDF Text Transcription for WD2511 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for WD2511. For precise diagrams, and layout, please refer to the original PDF.

WESTERN DIGITAl.. c oR p o R A TI oN LSI PACKET NETWORK INTERFACE WD2501/11 SHORT FORM DATA SHEET FEATURES • Packet Switching Controller Compatible with CCITI Recommendat...

View more extracted text
ATURES • Packet Switching Controller Compatible with CCITI Recommendation X.2S, Level 2, LAP. • Programmable Primary Timer (T1) And Retransmission Counter (N2) • Programmable A-Field Which Provides A Wider Range Of Applications Than Defined By X.25. These Include: DTE-To-DTE Connection, Multipoint, And Loop-Back Testing • Direct Memory Access (DMA) Transfer: Two Channels; One For Transmit And One For Receive. Send I Receive Data Accessed By Indirect Addressing Method. No External Address Latches Required. Sixteen Output Address Lines. • Zero Bit Insert And Delete • Automatic Appending and Testing Of FCS Field • Computer Bu