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W364M72V-XSBX - 64Mx72 Synchronous DRAM

Datasheet Summary

Description

The 512MByte (4.5Gb) SDRAM is a high-speed CMOS, dynamic random-access, memory using 9 chips containing 512M bits.

Each chip is internally configured as a quadbank DRAM with a synchronous interface.

Each of the chip’s 134,217,728-bit banks is organized as 8,192 rows by 2,048 columns by 8 bits.

Features

  • High Frequency = 100, 125MHz Package:.
  • 219 Plastic Ball Grid Array (PBGA), 32 x 25mm 3.3V ±0.3V power supply for core and I/Os Fully Synchronous; all signals registered on positive edge of system clock cycle Internal pipelined operation; column address can be changed every clock cycle Internal banks for hiding row access/precharge Programmable Burst length 1,2,4,8 or full page 8,192 refresh cycles Commercial, Industrial and Military Temperature Ranges Organized as 64M x 72 Weight: W364M.

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Datasheet Details

Part number W364M72V-XSBX
Manufacturer White Electronic Designs Corporation
File Size 527.54 KB
Description 64Mx72 Synchronous DRAM
Datasheet download datasheet W364M72V-XSBX Datasheet
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    White Electronic Designs 64Mx72 Synchronous DRAM FEATURES High Frequency = 100, 125MHz Package: • 219 Plastic Ball Grid Array (PBGA), 32 x 25mm 3.3V ±0.3V power supply for core and I/Os Fully Synchronous; all signals registered on positive edge of system clock cycle Internal pipelined operation; column address can be changed every clock cycle Internal banks for hiding row access/precharge Programmable Burst length 1,2,4,8 or full page 8,192 refresh cycles Commercial, Industrial and Military Temperature Ranges Organized as 64M x 72 Weight: W364M72V-XSBX - TBD grams typical W364M72V-XSBX ADVANCED* www.DataSheet4U.
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