Description
The EDI7F328XDNSN and EDI7F2328XDNSN are organized as one and two banks of 8M x 32 respectively.
VSS DQ29 DQ30 DQ31 W2# A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 PIN 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 NAME A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Features
- 8M x 32 and 2 x 8M x 32 Densities Based on Intel’s Strataflash (J3) family of Flash Devices.
- E28F640J3 (64) 128Kb Erase Blocks (Symetrical) High Performance Interface Async Page Mode Reads.
- 120/25 ns Read Access Time 2.7V - 3.6V Vcc Operation 128 bit Protection Register;.
- 64 bit Unique Device Identifier.
- 64 bit User Programmable OTP Cells Common Flash Interface (CFI) Scaleable Command Set (SCS) 32 byte Write Buffer, 64M Total Erase Cycles.
- 100,000 Erase.