W78M64V-XSBX Description
DQ0-63 A0-22 WE#1-4 CS#1-4 OE# RESET# WP#/ACC RY/BY# VCC VIO GND DNU Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Hardware Reset Hardware Write Protection/Acceleration Ready/Busy Output Power Supply I/O Power Supply Ground Do.
W78M64V-XSBX Key Features
- 159 PBGA, 13x22mm
- 1.27mm pitch 1,000,000 Erase/Program Cycles per sector Page Mode
- Page size is 8 words: Fast page read access from random locations within the page. Sector Architecture
- Bank A (16Mb): 4Kw x 8 and 32 Kw x 31
- Bank B (48Mb): 32Kw x 96
- Bank C (48Mb): 32Kw x 96
- Data can be continuously read from one bank while executing erase/program functions in another bank
- Zero latency between read and write operations Erase Suspend/Resume
- Suspends erase operations to allow read or programming in other sectors of same bank Data Polling and Toggle Bits
- Provides a software method of detecting the status of program or erase cycles