WMS256K16-xxx Overview
A0-17 LB# UB# I/O1-16 CS# OE# WE# VCC GND NC Address Inputs Lower-Byte Control (I/O1-8) Upper-Byte Control (I/O9-16) Data Input/Output Chip Select Output Enable Write Enable +5.0V Power Ground No Connection August 2004 Rev. 6 1 White Electronic Designs Corporation (602) 437-1520 .wedc. VIH = VCC -0.3V, VIL = 0.3V LOW POWER DATA RETENTION CHARACTERISTICS (WMS256K16L-XXX ONLY) -55°C ≤ TA ≤ +125°C Parameter.
WMS256K16-xxx Key Features
- Access Times 17, 20, 25, 35ns MIL-STD-883 pliant Devices Available Packaging
- 44 pin Ceramic SOJ (Package 102)
- 44 lead Ceramic Flatpack (Package 225)
- 44 lead Formed Ceramic Flatpack
- Organized as 256Kx16 Data Byte Control
- Lower Byte (LB#) = I/O1-8
- Upper Byte (UB#) = I/O9-16
- 2V Minimum Data Retention for battery back up operation (WMS256K16L-XXX Low Power Version Only) mercial, Industrial and