WV3HG264M72EER-PD4 - 1GB - 2x64Mx72 DDR2 SDRAM REGISTERED

Datasheet Summary

Description

The WV3HG264M72EER is a 2x64Mx72 Double Data Rate DDR2 SDRAM high density module.

This memory module consists of eighteen 64Mx8 bit DDR2 Synchronous DRAMs in FBGA packages, mounted on a 200-pin SODIMM FR4 substrate.

This product is under development, is not qualiﬁed or characterized and is sub

Features

Registered 200-pin (SO-DIMM), Small-Outline dual in-line memory module Support ECC detection and correction Fast data transfer rates: PC2-6400.
, PC2-5300.
, PC2-4200 and PC2-3200 VCC = VCCQ = 1.8V ±0.1V VCCSPD = 1.7V to 3.6V JEDEC standard 1.8V I/O (SSTL_18-compatible) Differential data strobe (DQS, DQS#) option Four-bit prefetch architecture Multiple internal device banks for concurrent operation Differential clock inputs (CK, CK#) Programmable CAS# latency (CL): 3, 4, 5.
, and 6.

White Electronic Designs

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Datasheet Details

Part number	WV3HG264M72EER-PD4
Manufacturer	White Electronic Designs
File Size	252.14 KB
Description	1GB - 2x64Mx72 DDR2 SDRAM REGISTERED
Datasheet	WV3HG264M72EER-PD4 Datasheet
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White Electronic Designs WV3HG264M72EER-PD4 ADVANCED* 1GB – 2x64Mx72 DDR2 SDRAM REGISTERED, SO-DIMM, w/PLL FEATURES Registered 200-pin (SO-DIMM), Small-Outline dual in-line memory module Support ECC detection and correction Fast data transfer rates: PC2-6400*, PC2-5300*, PC2-4200 and PC2-3200 VCC = VCCQ = 1.8V ±0.1V VCCSPD = 1.7V to 3.6V JEDEC standard 1.8V I/O (SSTL_18-compatible) Differential data strobe (DQS, DQS#) option Four-bit prefetch architecture Multiple internal device banks for concurrent operation Differential clock inputs (CK, CK#) Programmable CAS# latency (CL): 3, 4, 5*, and 6* Posted CAS# additive latency: 0, 1, 2, 3 and 4 On-die termination (ODT) 7.

Published: Oct 13, 2009 |