EDI8L24128C Description
The EDI8L24128CxxBC is a 5V, three megabit SRAM constructed with three 128Kx8 die mounted on a multilayer laminate substrate. With 12 to 15ns access times, x24 width and a 5V operating voltage, the EDI8L2418C is ideal for creating a single chip memory solution for the Motorola DSP5600x or a two chip solution for the Analog Devices SHARC™ DSP. The single or dual chip memory solutions offer improved system performance...
EDI8L24128C Key Features
- 128Kx24 bit CMOS Static
- Random Access Memory Array
- Fast Access Times: 12 and 15ns
- Master Output Enable and Write Control
- TTL patible Inputs and Outputs
- Fully Static, No Clocks
- EDI8L24128C
- 119 Lead BGA (JEDEC MO-163), No. 391
- Small Footprint, 14mm x 22mm
- Multiple Ground Pins for Maximum Noise