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EDI8L24128C - 128Kx24 Asynchronous SRAM

Datasheet Summary

Description

The EDI8L24128CxxBC is a 5V, three megabit SRAM constructed with three 128Kx8 die mounted on a multilayer laminate substrate.

Features

  • 128Kx24 bit CMOS Static.
  • Random Access Memory Array.
  • Fast Access Times: 12 and 15ns.
  • Master Output Enable and Write Control.
  • TTL Compatible Inputs and Outputs.
  • Fully Static, No Clocks.
  • EDI8L24128C.

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Datasheet Details

Part number EDI8L24128C
Manufacturer White Electronic
File Size 326.39 KB
Description 128Kx24 Asynchronous SRAM
Datasheet download datasheet EDI8L24128C Datasheet
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www.DataSheet4U.com White Electronic Designs 128Kx24 Asynchronous SRAM, 5V FEATURES  128Kx24 bit CMOS Static  Random Access Memory Array  Fast Access Times: 12 and 15ns  Master Output Enable and Write Control  TTL Compatible Inputs and Outputs  Fully Static, No Clocks  EDI8L24128C DESCRIPTION The EDI8L24128CxxBC is a 5V, three megabit SRAM constructed with three 128Kx8 die mounted on a multilayer laminate substrate. With 12 to 15ns access times, x24 width and a 5V operating voltage, the EDI8L2418C is ideal for creating a single chip memory solution for the Motorola DSP5600x or a two chip solution for the Analog Devices SHARC™ DSP.
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