W3EG64255S-JD3 Overview
The W3EG64255S is a 2x128Mx64 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM ponent. The module consists of sixteen 256Mx4 stacks, in 66 pin TSOP packages mounted on a 184 pin FR4 substrate. Synchronous design allows precise cycle control with the use of system clock.
W3EG64255S-JD3 Key Features
- JEDEC design specifications Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Late
W3EG64255S-JD3 Applications
- This product is under development, is not qualified or characterized and is subject to change or cancellation without notice