W3EG6467S-D4 Key Features
- JEDEC design specifications Double-data-rate architecture Bi-directional data strobes (DQS) Differential clock inputs (CK
| Part Number | Description |
|---|---|
| W3EG6462S-D3 | 512MB - 2x32Mx64 DDR SDRAM UNBUFFERED |
| W3EG6462S-JD3 | 512MB - 2x32Mx64 DDR SDRAM UNBUFFERED |
| W3EG6464S-AD4 | 512MB - 64Mx64 DDR SDRAM UNBUFFERED |
| W3EG6464S-BD4 | 512MB - 64Mx64 DDR SDRAM UNBUFFERED |
| W3EG6464S-D3 | 512MB - 64Mx64 DDR SDRAM UNBUFFERED |