WF4M16-XDTX5
Key Features
- 56 Lead, Hermetic Ceramic, 0.520" CSOP (Package 213). Fits standard 56 SSOP footprint. s Sector Architecture
- 32 equal size sectors of 64KBytes per each 2Mx8 chip
- Any combination of sectors can be erased. Also supports full chip erase. s Minimum 100,000 Write/Erase Cycles Minimum s Organized as two banks of 2Mx16; User Configurable as 4 x 2Mx8 s Commercial, Industrial, and Military Temperature Ranges s 5 Volt Read and Write. 5V ± 10% Supply. s Low Power CMOS s Data Polling and Toggle Bit feature for detection of program or erase cycle completion. s Supports reading or programming data to a sector not being erased. s Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation, Separate Power and Ground Planes to improve noise immunity s RESET pin resets internal state machine to the read mode. s Ready/Busy (RY/BY) output for direction of program or erase cycle completion.
- This data sheet describes a product that may or may not be under development and is subject to change or cancellation without notice. Note: For programming information refer to Flash Programming 16M5 Application Note. FIG. 1
