Winbond Electronics Corporation W641GG2JB
The W641GG2JB 1-Gbit GDDR3 GRAPHICS SDRAM is a high speed dynamic random-access memory designed for applications requiring high bandwidth. It contains 1,073,741,824 bits. The device can be configured to operate in two different modes: • in 2-CS mode the chip is organized as two 512 Mbit memories of 8 banks each, with 4096 row locations and 512 column locations per bank.GENERAL DESCRIPTION
It contains 1,073,741,824 bits.● in 1-CS mode the chip is organized as one 1 Gbit memory, with 8192 row locations and 512 column locations per bank. The GDDR3 GRAPHICS SDRAM uses a double data rate architecture to achieve high speed operation. The double data rate architecture is essentially a 4n prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the GDDR3 GRAPHICS SDRAM effectively consists of a 4n data transfer every two clock cycles at the internal DRAM core and four corresponding n-bit wide, one-half-clockcycle data transfers at the I/O pins. Unidirectional data strobes are transmitted externally, along with data, for use in data capture at the receiver. RDQS is a strobe transmitted by the GDDR3 GRAPHICS SDRAM during READs. WDQS is the data strobe sent by the memory controller during WRITEs. RDQS is edge-aligned with data for READs and WDQS is center-aligned with data for WRITEs.