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W942516AH Description

W942516AH is a CMOS Double Data Rate synchronous dynamic random access memory (DDR SDRAM), organized as 4,194,304 words × 4 banks × 16 bits. Using pipelined architecture and 0.175 µm process technology, W942516AH delivers a data bandwidth of up to 286M words per second (-7). To fully ply with the personal puter industrial standard, W942516AH is sorted into three speed grades:.

W942516AH Key Features

  • 2.5V ± 0.2V Power Supply
  • Up to 143 MHz Clock Frequency
  • Double Data Rate architecture; two data transfers per clock cycle
  • Differential clock inputs (CLK and CLK )
  • DQS is edge-aligned with data for Read; center-aligned with data for Write
  • CAS Latency: 2 and 2.5
  • Burst Length: 2, 4, and 8
  • Auto Refresh and Self Refresh
  • Precharged Power Down and Active Power-Down
  • Write Data Mask