GENERAL DESCRIPTION
Using pipelined architecture and 0.11 µm process technology, W9425G6DH delivers a data bandwidth of up to 500M words per second (-4). To fully comply with the personal computer industrial standard, W9425G6DH is sorted into four speed grades: -4, -5, -6 and -75. The -6 is compliant to the DDR333/CL2.5 specification (the -6I grade which is guaranteed to support -40°C ~ 85°C). The -75 is compliant to the DDR266/CL2 specification (the 75I grade which is guaranteed to support -40°C ~ 85°C). All Input reference to the positive edge of CLK (except for DQ, DM and CKE). The timing reference point for the differential clock is when the CLK and CLK signals cross during a transition. Write and Read data are synschronized with the both edges of DQS (Data Strobe). By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W9425G6DH is ideal for main memory in high performance applications. 2.