GENERAL DESCRIPTION
W9812G2IH delivers a data bandwidth of up to 166M words per second (-6). (The speed grade of -6C supports tRP=16nS, tRCD=16nS, tRC=48nS, tAC=4.5nS, tIH=0.8nS and the -6I industrial grade, -6A automotive grade which is guaranteed to support -40°C ~ 85°C). The -75 is compliant to the 133MHz/CL3 specification. Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time. By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W9812G2IH is ideal for main memory in high performance applications.