GENERAL DESCRIPTION
W9864G2JB is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words 4 banks 32 bits. W9864G2JB delivers a data bandwidth of up to 166M words per second. The -6 and -6I parts can run up to 166MHz/CL3. The -7 and -7I parts can run up to 143MHz/CL3. The -6I, 7I industrial grade parts. Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time. By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W9864G2JB is ideal for main memory in high performance applications.