Description
1 VSS Ground 2 VDD Power supply for Logic 3 VO (Variable) Operation voltage LCD driving 4 A0 H/L H:Data L:Instruction 5 WR H 8080 family: Write signal, 6800 family: R/W signal 6 RD L 8080 family: Read signal, 6800 family: Enable clock 7-14 DB0-DB7 H/L DB0 Data bus line 15 CS 16 RES H/L Chip Enable H/L Reset 17 VEE Positive voltage output 18 SEL1 H/L 8080 OR 6800 Family Interface Select ; H:68xx , L:80xx 19 A 20 K Power supply for B/L+ Power supply for B/L- WO320240D-TFH-V# 第 4 頁，共 5 頁 Contour Drawing & 3.25 5.1 6.5 12.7 14.66 0.9 5.15 7.25 9.6 94.7±0.5 93.8 85.3 81.4 (VA) 76.785 (AA) 8.6MAX K 39.96 320*240 dots 83.3±0.5 76.8 71.7 70.3 61.0 (VA) 57.11 (AA) 4 - 6.5 A 0.238 0.223 20.47±1.0 E IO 1 -2 E IO 2 -2 MD FR E IO 1 -1 LP D ISP X CK D3 D2 D1 D0 E IO 2 -1 V DD L /R VSS V5 V 43 V 12 VO CON20 20 CON1 1 1 16 CON20 20 11 CON16 16 1 1 2 3 4 5 6 7 8 9 10 11 12 CON2 13 14 15 16 CN-FPC-20P/P1.0 17 (Down-Side) 18 19 20 VSS VDD VO A0 WR RD DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 CS RES VEE+ SEL1 A K 34.80±1.0 0.24 0.225 DOT SIZE SCALE 20/1 The non-specified tolerance of dimension is ±0.3 mm.
