Xicor X68257
The X68257 is an 32K x 8 E2PROM fabricated with advanced CMOS Textured Poly Floating Gate Technology. The X68257 features a multiplexed address and data bus allowing direct interface to a variety of popular single-chip microcontrollers operating in expanded multiplexed mode without the need for additional interface circuitry. The addresses flow into the device while AS is HIGH.| Part No. | X68257 |
|---|---|
| Datasheet | X68257 Download |
| Manufacturer |  Xicor |
| Description | E2 Micro-Peripheral |
| Buy | Stock & Price |
DESCRIPTION
32,768 x 8 BitFEATURES
● Multiplexed Address/Data Bus —Direct Interface to Popular 68HC11 Family● High Performance CMOS —Fast Access Time, 120ns —Low Power —60mA Active Maximum —500µA Standby Maximum
● Software Data Protection
● Toggle Bit Polling —Early End of Write Detection
● Page Mode Write —Allows up to 128 Bytes to be Written in One Write Cycle
● High Reliability —Endurance: 10,000 Write Cycle —Data Retention: 100 Years
● 28-Lead PDIP Package
● 28-Lead SOIC Package
● 32-Lead PLCC Package FUNCTIONAL DIAGRAM CE, CE R/W E SEL A8–A14 CONTROL LOGIC X D E C O D E SOFTWARE DATA PROTECT AS L A T C H E S 32K x 8 E2PROM Y DECODE I/O & ADDRESS LATCHES AND BUFFERS A/D0–A/D7 6539 ILL F02.2 © Xicor, Inc. 1994, 1995, 1996 Patents Pending 6539-1.7 9/16/96 T0/C1/D2 SH 1 Characteristics subject to change without notice X68257 PIN DESCRIPTIONS Address/Data (A/D0–A/D7) Multiplexed low-order addresses and data. After AS transitions from a HIGH to LOW the addresses are latched. Once the addresses are latched these pins input data or output data depending on R/W, SEL, and CE.
