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17512LJC - XC17512LJC

Datasheet Summary

Description

The XC1700 family of configuration PROMs provides an easy-to-use, cost-effective method for storing large Xilinx FPGA configuration bitstreams.

When the FPGA is in Master Serial mode, it generates a configuration clock that drives the PROM.

Features

  • One-time programmable (OTP) read-only memory designed to store configuration bitstreams of Xilinx FPGA devices Simple interface to the FPGA; requires only one user I/O pin Cascadable for storing longer or multiple bitstreams Programmable reset polarity (active High or active Low) for compatibility with different FPGA solutions XC17128E/EL, XC17256E/EL, XC1701 and XC1700L series support fast configuration Low-power CMOS Floating Gate process XC1700E series are available in 5V and 3.3V v.

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Datasheet Details

Part number 17512LJC
Manufacturer Xilinx
File Size 158.88 KB
Description XC17512LJC
Datasheet download datasheet 17512LJC Datasheet
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    0 R XC1700E and XC1700L Series Configuration PROMs 0 8 DS027 (v3.1) July 5, 2000 Product Specification Features • One-time programmable (OTP) read-only memory designed to store configuration bitstreams of Xilinx FPGA devices Simple interface to the FPGA; requires only one user I/O pin Cascadable for storing longer or multiple bitstreams Programmable reset polarity (active High or active Low) for compatibility with different FPGA solutions XC17128E/EL, XC17256E/EL, XC1701 and XC1700L series support fast configuration Low-power CMOS Floating Gate process XC1700E series are available in 5V and 3.3V versions XC1700L series are available in 3.3V only Available in compact plastic packages: 8-pin SOIC, 8-pin VOIC, 8-pin PDIP, 20-pin SOIC, 20-pin PLCC, 44-pin PLCC or 44-pin VQFP.
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