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17S15APC - Spartan-II/Spartan-IIE Family OTP Configuration PROMs

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Xilinx

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17S15APC Spartan-II/Spartan-IIE Family OTP Configuration PROMs by Xilinx - Datasheet Preview — Datasheet preview – 17S15APC

Datasheet Details

Part number	17S15APC
Manufacturer	Xilinx
File Size	119.59 KB
Description	Spartan-II/Spartan-IIE Family OTP Configuration PROMs
Datasheet	17S15APC Datasheet
Additional preview pages of the 17S15APC datasheet.

Product details

Description

Pin Description Data output, High-Z state when either CE or OE are inactive.

During programming, the DATA pin is I/O.

Features

Configuration one-time programmable (OTP) read-only memory designed to store configuration bitstreams for Spartan-II/Spartan-IIE FPGA devices.
Simple interface to the Spartan device.
Programmable reset polarity (active High or active Low).
Low-power CMOS floating gate process www. DataSheet4U. com.
3.3V PROM.
Available in compact plastic 8-pin DIP, 8-pin VOIC, 20-pin SOIC, or 44-pin VQFP packages. Programming supp.

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Published: Aug 8, 2008 |