Xilinx VIRTEX-4
the Virtex-4 Ethernet MAC primitive; however, due to the complexity and the large number of ports, the CORE Generator simplifies integration of the Ethernet MAC by providing HDL examples based on user-selectable configurations. The precise number depends on user configuration; see "Device Utilization" on page 7. The Virtex-4 Embedded Tri-Mode Ethernet MAC User Guide is available under the Related Information area of the product page.FEATURES
● Allows selection of one or both Ethernet MACs (EMAC0/EMAC1) from the Embedded Ethernet MAC primitive Design File Formats Constraints File Example Designs● Connects the EMAC0/EMAC1 tie-off pins based on user options
● Provides user-configurable Ethernet MAC physical interfaces, including - Supports MII, GMII, RGMII v1.3, RGMII v2.0, SGMII, and 1000BASE-X PCS/PMA interfaces - Instantiates clock buffers, DCMs, RocketIO™ Multi-Gigabit Transceivers (MGTs), and logic as required for the selected physical interfaces
● Provides a simple FIFO-loopback example design, which is connected to the MAC client interfaces
● Provides a simple demonstration test bench based on the selected configuration
● Includes an example of a low-level driver for DCR accesses
● Generates VHDL or Verilog 1. 2. 3. Scripts provided for Mentor ModelSim and Cadence IUS only. © 2007 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc.