XAPP512 - Implementing Keypad Scanners

Description

of Verilog source code for a keypad scanner.

The code is used to target the lowest density, 32-macrocell CoolRunnerTM-II XC2C32A CPLD device in a CP56 package (6 mm x 6 mm).

The keypad accommodated in this design has 8 rows and 8 columns.

Features

into them, they require more effective ways of entering data. Most cell phones, for example, use the standard DTMF style keypad and a multi-tap process to enter alphanumeric data; however, for larger amounts of data multi-tapping becomes cumbersome. More and more high-end phones are therefore employing QWERTY keypads that make entering data easier and quicker. Going from a DTMF to a QWERTY keypad requires more I/O. For instance, a DTMF keypad might have 4 rows and 3 columns, where a QWERTY keypa.

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Datasheet Details

Part number	XAPP512
Manufacturer	Xilinx
File Size	313.51 KB
Description	Implementing Keypad Scanners
Datasheet	XAPP512 Datasheet
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www.DataSheet4U.com Application Note: CoolRunner-II CPLD R Implementing Keypad Scanners with CoolRunner-II XAPP512 (v1.0) April 4, 2005 Summary This application note provides a functional description of Verilog source code for a keypad scanner. The code is used to target the lowest density, 32-macrocell CoolRunnerTM-II XC2C32A CPLD device in a CP56 package (6 mm x 6 mm). The keypad accommodated in this design has 8 rows and 8 columns. The design can easily be scaled to target keypads with more or less rows/columns. For instance, a keypad with 7 rows and 7 columns would allow the design to fit in the smallest QFG32 package (5 mm x 5 mm). To obtain the Verilog source code described in this document, see “Verilog Code,” page 4, for instructions.

Published: Jul 5, 2006 |