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XC17S100A - Spartan-II/Spartan-IIE Family OTP Configuration PROMs

This page provides the datasheet information for the XC17S100A, a member of the XC17S00A Spartan-II/Spartan-IIE Family OTP Configuration PROMs family.

Datasheet Summary

Features

  • Configuration one-time programmable (OTP) read-only memory designed to store configuration bitstreams for Spartan™-II/Spartan-IIE FPGA devices.
  • Simple interface to the Spartan device.
  • Programmable reset polarity (active High or active Low).
  • Low-power CMOS floating gate process.
  • 3.3V PROM.
  • Available in compact plastic 8-pin DIP, 8-pin VOIC, 20-pin SOIC, or 44-pin VQFP packages.
  • Programming support by leading programmer manufacturers.

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Datasheet preview – XC17S100A

Datasheet Details

Part number XC17S100A
Manufacturer Xilinx
File Size 138.96 KB
Description Spartan-II/Spartan-IIE Family OTP Configuration PROMs
Datasheet download datasheet XC17S100A Datasheet
Additional preview pages of the XC17S100A datasheet.

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Full PDF Text Transcription

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0 R DS078 (v1.10) June 25, 2007 05 Spartan-II/Spartan-IIE Family OTP Configuration PROMs (XC17S00A) Product Specification Features • Configuration one-time programmable (OTP) read-only memory designed to store configuration bitstreams for Spartan™-II/Spartan-IIE FPGA devices • Simple interface to the Spartan device • Programmable reset polarity (active High or active Low) • Low-power CMOS floating gate process • 3.
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