XC3000A Datasheet PDF

Xilinx XC3000A

the XC3000A and XC3100 families: • • • • Additional interconnect resources for TBUFs and CE inputs Error checking of the configuration bitstream Soft startup holds all outputs slew-rate limited during initial power-up More advanced CMOS process • • Low-Voltage Versions Available • • • Low-voltage devices function at 3.0 - 3.6 V XC3000L - Low-voltage versions of XC3000A devices XC3100L - Low-voltage versions of XC3100A devices • Array 8x8 10 x 10 12 x 12 16 x 14 16 x 20 22 x 22 User I/Os Flip-Flops Max 64 256 80 96 120 144 176 360 480 688 928 1,320 Horizontal Longlines 16 20 24 32 40 44... The general structure of an FPGA is shown in Figure 2. The development system provides schematic capture and auto place-and-route for design entry.