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XC3100L - Field Programmable Gate Arrays (XC3000A/L/ XC3100A/L)

General Description

Complete Development System - Schematic capture, automatic place and route - Logic and timing simulation - Interactive design editor for design optimization - Timing calculator - Interfaces to popular design environments like Viewlogic, Cadence, Mentor Graphics, and others

Key Features

  • Complete line of four related Field Programmable Gate Array product families - XC3000A, XC3000L, XC3100A, XC3100L Ideal for a wide range of custom VLSI design tasks - Replaces TTL, MSI, and other PLD logic - Integrates complete sub-systems into a single package - Avoids the NRE, time delay, and risk of conventional masked gate arrays High-performance CMOS static memory technology - Guaranteed toggle rates of 70 to 370 MHz, logic delays from 7 to 1.5 ns - System clock speeds over 85 MHz.

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Datasheet Details

Part number XC3100L
Manufacturer Xilinx (now AMD)
File Size 731.32 KB
Description Field Programmable Gate Arrays (XC3000A/L/ XC3100A/L)
Datasheet download datasheet XC3100L Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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0 R XC3000 Series Field Programmable Gate Arrays (XC3000A/L, XC3100A/L) 0 7* November 9, 1998 (Version 3.