Xilinx XC3S400
The Spartan®-3 family of Field-Programmable Gate Arrays is specifically designed to meet the needs of high volume, cost-sensitive consumer electronic applications. The eight-member family offers densities ranging from 50,000 to 5,000,000 system gates, as shown in Table 1.| Part No. | XC3S400 |
|---|---|
| Datasheet | XC3S400 Download |
| Manufacturer |  Xilinx |
| Description | Spartan-3 FPGA |
| Buy | Stock & Price |
FEATURES
● Architectural Overview● Array Sizes and Resources
● User I/O Chart
● Ordering Information Module 2: Functional
DESCRIPTION
DS099 (v3.1) June 27, 2013● Input/Output Blocks (IOBs)
● IOB Overview
● SelectIO™ Interface I/O Standards
● Configurable Logic Blocks (CLBs)
● Block RAM
● Dedicated Multipliers
● Digital Clock Manager (DCM)
● Clock Network
● Configuration Module 3: DC and Switching Characteristics DS099 (v3.1) June 27, 2013
● DC
ELECTRICAL CHARACTERISTICS
●ABSOLUTE MAXIMUM RATINGS
● Supply Voltage Specifications● Recommended Operating Conditions
● DC Characteristics
● Switching Characteristics
● I/O Timing
● Internal Logic Timing
● DCM Timing
● Configuration and JTAG Timing Spartan-3 FPGA Family Data Sheet Product Specification Module 4: Pinout Descriptions DS099 (v3.1) June 27, 2013
● Pin Descriptions
● Pin Behavior During Configuration
● Package Overview
● Pinout Tables
● Footprints © Copyright 2003–2013 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, Artix, Kintex, Zynq, Vivado, and other designated brands included herein are trademarks of Xilinx in the United States and other countries.
