XCF16S Datasheet | Xilinx

Features - - - - - - - - - - In-System Programmable PROMs for Configuration of Xilinx FPGAs Low-Power Advanced CMOS NOR FLASH Process Endurance of 20,000 Program/Erase Cycles Operation over Full Industrial Temperature Range (- 40°C to +85°C) IEEE Standard 1149.1/1532 Boundary-Scan (JTAG) Support for Programming, Prototyping, and Testing JTAG mand Initiation of Standard FPGA Configuration Cascadable for Storing Longer or Multiple Bitstreams Dedicated Boundary-Scan (JTAG) I/O Power Supply (VCCJ) I/O Pins patible with Voltage Levels Ranging From 1.5V to 3.3V Design Support Using the Xilinx Alliance ISE and Foundation ISE Series Software Packages - - XCF01S/XCF02S/XCF04S - 3.3V supply voltage - Serial FPGA configuration interface (up to 33 MHz) - Available in small-footprint VO20 and VOG20 packages. XCF08P/XCF16P/XCF32P - 1.8V supply voltage - Serial or parallel FPGA configuration interface (up to 33 MHz) - Available in small-footprint VO48, VOG48, FS48, and FSG48 packages - Design revision technology enables storing and accessing multiple design revisions for configuration - Built-in data depressor patible with Xilinx advanced pression technology Table 1: Platform Flash PROM Features Density VCCINT VCCO Range VCCJ Range Packages JTAG ISP Programming Serial Parallel Config. Config. Design Revisioning pression XCF01S XCF02S XCF04S XCF08P XCF16P XCF32P 1 Mbit 2 Mbit 4 Mbit 8 Mbit 16 Mbit 32 Mbit 3.3V 3.3V 3.3V 1.8V 1.8V 1.8V 1.8V - 3.3V 1.8V - 3.3V 1.8V - 3.3V 1.5V - 3.3V 1.5V - 3.3V 1.5V - 3.3V 2.5V - 3.3V 2.5V - 3.3V 2.5V - 3.3V 2.5V - 3.3V 2.5V - 3.3V 2.5V - 3.3V VO20/VOG20 VO20/VOG20 VO20/VOG20 VO48/VOG48 FS48/FSG48 VO48/VOG48 FS48/FSG48 VO48/VOG48 FS48/FSG48 √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ Description Xilinx introduces the Platform Flash series of in-system programmable configuration PROMs. Available in 1 to 32 Megabit (Mbit) densities, these PROMs provide an easy-to-use, cost-effective, and reprogrammable method for storing large Xilinx FPGA...