XCR22LV10-15SO24I
Description
The XCR22LV10 is the first SPLD to bine high performance with low power, without the need for "turbo bits" or other power down schemes. To achieve this, Xilinx has used their FZP design technique, which replaces conventional sense amplifier methods for implementing product terms (a technique that has been used in PLDs since the bipolar era) with a cascaded chain of pure CMOS gates.
Key Features
- Industry's first TotalCMOS™ SPLD
- both CMOS design and process technologies Fast Zero Power (FZP™) design technique provides ultra-low power and high speed
- Static current of less than 45 µA
- Dynamic current substantially below that of peting devices
- 24-pin TSOIC–uses 93% less in-system space than a 28-pin PLCC
