XCR3128A Overview
The XCR3128A CPLD (plex Programmable Logic Device) is a member of the CoolRunner® family of CPLDs from Xilinx. These devices bine high speed and zero power in a 128 macrocell CPLD. With the FZP design technique, the XCR3128A offers true pin-to-pin speeds of 7.5 ns, while simultaneously delivering power that is less than 100 µA at standby without the need for ‘turbo bits' or other power-down schemes.
XCR3128A Key Features
- Industry's first TotalCMOS™ PLD
- both CMOS design and process technologies Fast Zero Power (FZP™) design technique provides ultra-low power and very high
- On-chip supervoltage generation
- ISP mands include: Enable, Erase, Program, Verify
- Supported by multiple ISP programming platforms
- 4-pin JTAG interface (TCK, TMS, TDI, TDO)
- Programmable 3-state buffer
- Asynchronous macrocell register preset/reset
- Up to two, asynchronous clocks Programmable global 3-state pin facilitates "bed of nails" testing without using logic re