Download the XCV200E datasheet PDF.
This datasheet also covers the XCV100E variant, as both devices belong to the same 1.8v field programmable gate arrays family and are provided as variant models within a single manufacturer datasheet.
Key Features
Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels) - Designed for low-power operation - PCI compliant 3.3 V, 32/64-bit, 33/ 66-MHz.
Highly Flexible SelectI/O+™ Technology - Supports 20 high-performance interface standards - Up to 804 singled-ended I/Os or 344 differential I/O pairs for an aggregate bandwidth of > 100 Gb/s.
Differential Signalling Support - LVDS (622 Mb/s), BLVDS (Bus LVDS), L.
Full PDF Text Transcription for XCV200E (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
XCV200E. For precise diagrams, and layout, please refer to the original PDF.
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE — 0 R Virtex™-E 1.8 V Field Programmable Gate Arrays DS022-1 (v3.0) March 21, 2014 00 Features • Fast, High-Density 1.8 V FPGA...
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22-1 (v3.0) March 21, 2014 00 Features • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels) - Designed for low-power operation - PCI compliant 3.
XCV200E Datasheet
