Datasheet Summary
XS1-G04B-FB144 Datasheet
Document Number: 1087D
Publication Date: 2011/10/06 Copyright © 2010 XMOS Limited, All Rights Reserved.
XS1-G04B-FB144 Datasheet
1 Features
- Quad-Core Device with Advanced Multi-Threaded RISC Architecture
- Up to 1600 MIPS shared between up to 32 real-time threads
- Each thread has:
- Guaranteed throughput of between 1/4 and 1/8 of core MIPS
- 16x32bit dedicated registers
- 159 high-density 16/32-bit instructions
- All have single clock-cycle execution (except for divide)
- High-performance DSP (32x32→64-bit MAC) and cryptographic instructions
- Programmable I/O
- 88 general-purpose I/O pins, configurable as input, output or bi-directional ports
- Port...