XS1-G04B-FB144
Key Features
- Quad-Core Device with Advanced Multi-Threaded RISC Architecture
- Up to 1600 MIPS shared between up to 32 real-time threads
- Each thread has: - Guaranteed throughput of between 1/4 and 1/8 of core MIPS - 16x32bit dedicated registers
- 159 high-density 16/32-bit instructions - All have single clock-cycle execution (except for divide) - High-performance DSP (32x32→64-bit MAC) and cryptographic instructions
- Programmable I/O
- 88 general-purpose I/O pins, configurable as input, output or bi-directional ports
- Port sampling rates of up to 60 MHz with respect to an external clock
- 128 channel ends for communication with other threads, on or off-chip
- Non-Volatile Memory
- 256KB internal single-cycle SRAM (max 64KB per core) for code and data storage
