XS1-G04B-FB144 Overview
Module Power PLL JTAG XCore 0 I/O Signal Function Type Active Properties PU=Pull Up, PD=Pull Down, ST=Schmitt Trigger, OT=Output Tristate, S=Switchable VDD RS=Required for SPI boot (§5.8), RU=Required for USB-enabled devices (§10) Digital core power PWR VSS Digital ground GND IO VDD Digital I/O power PWR SS_PLL_AGND Analog ground for PLL GND SS_PLL_AVDD Analog PLL power PWR OTP_VPP OTP programming voltage PWR SS_.
XS1-G04B-FB144 Key Features
- Quad-Core Device with Advanced Multi-Threaded RISC Architecture
- Up to 1600 MIPS shared between up to 32 real-time threads
- Each thread has
- Guaranteed throughput of between 1/4 and 1/8 of core MIPS
- 16x32bit dedicated registers
- 159 high-density 16/32-bit instructions
- All have single clock-cycle execution (except for divide)
- High-performance DSP (32x32→64-bit MAC) and cryptographic instructions
- Programmable I/O
- 88 general-purpose I/O pins, configurable as input, output or bi-directional ports