FEATURES
q Wide volume range (can be used in three ways) q Adjustment step q Gain Error q Low distortion factor q Low residual noise A: +32.0 to – 95.0dB IN1=IN2 (Input < 2.0Vrms @VDD=5V) B: +29.5 to – 97.5dB IN2=GND (Input < 2.6Vrms @VDD=5V) C: +20.0 to – 107.0dB IN1=GND (Input < 7.9Vrms @VDD=5V) adjustable in 256 steps, with 0.5dB per step ± 0.1dB 0.001% (input=150 mVrms, gain=+16dB) 1 µVrms (gain=- ) s Others Process Package Power supply voltage Operating temperature Power consumption CMOS process 20 SSOP (YAC520-E) 5V 0 to +70 ºC 100 mW @VDD=5.0 V YAC520 CATALOG CATALOG No.: LSI-4AC520A4 2001.12 YAC520 s Block Diagram VREF + - LIN2 LIN1 Vref Generator & Reset pulse Generator LOUT 256 VREF DVSS DVDD L Zero Cross Detection AVSS AVDD R Reset ICN TE Control Register ZCEN SDATAO 16 S/P Register SDATAI CSN SCLK 256 RIN1 RIN2 ROUT + VREF 2 YAC520 s Pin Assignment SCLK SDATAO 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 SDATAI CSN ZCEN ICN TE RIN1 RIN2 AVSS LIN2 LIN1 DVDD DVSS AVSS A...
YAMAHA CORPORATION
