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YSS932 - 96kHz DIR Dolby Digital / Pro Logic II / DTS decoder Sub DSP

Datasheet Summary

Features

  • [ DIR Block ].
  • Sampling frequency: Two ranges are available including; 32k to 48kHz (normal rate) and 64k to 96kHz (double rate).
  • Provides master clock, 256fs, to DAC, ADC and the other peripheral devices. The clock output can be controlled with various modes determined by register settings.
  • Has a pin that indicates the double rate operation.
  • Every channel status and user data can be read through the microprocessor interface.
  • Has an output pin for.

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Datasheet Details

Part number YSS932
Manufacturer YAMAHA CORPORATION
File Size 421.93 KB
Description 96kHz DIR Dolby Digital / Pro Logic II / DTS decoder Sub DSP
Datasheet download datasheet YSS932 Datasheet
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Full PDF Text Transcription

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YSS932 AC3D3B 96kHz DIR + Dolby Digital / Pro Logic II / DTS decoder + Sub DSP OUTLINE YSS932 is one chip LSI consisting of three built-in blocks : SPDIF receiver (DIR), Dolby Digital (AC-3) / Pro Logic II & DTS decoder (Main DSP) and programmable sound fields processing DSP (Sub DSP). The Sub DSP is capable of realizing various sound fields, such as virtual surround by down-loading the program and coefficient from outside. FEATURES [ DIR Block ] • Sampling frequency: Two ranges are available including; 32k to 48kHz (normal rate) and 64k to 96kHz (double rate). • Provides master clock, 256fs, to DAC, ADC and the other peripheral devices. The clock output can be controlled with various modes determined by register settings. • Has a pin that indicates the double rate operation.
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