Description
No Name 1 / WR 2 / CS 3 AO 4 VDD
5 so
6 GND
7 j_M 8 / IC
9 D7 10 D6 11 D5 12 D4
13 03
14 D2 15 Dl 16 DO
l/O
Function
I CPU interface Write enable
I CPU Interface Chip se lect
I CPU interface Address/Data select
-
+5V power supply
0 DIA convertor output for SSG
-
Ground
I Master clock input
I+ Initial clear input
I CPU interface data bus (MSB)
I CPU interface data bus
I CPU interface data bus
I CPU interface data bus
I CPU interface data bus
I
CPU interface data bus
I CPU int
Features
- e Three sequence square wave generators and one noise generator, software-compatible with the YM2 l 49(SSG) e 3 built-in 5-bit DI A convertors and mixed output e CPU interface through / CS, / WR control signal and 8 bit data bus e Wide voicing range of 8 octaves e Smooth attenuation by wide dynamic range envelope generator e Power down mode e +SY single power supply, silicon gate CMOS process.
- 16-pin plastic DIP(YMZ284-D) or 16-pin plastic SOP (YMZ284-M). - - - - - - Y A M A H A.
YMZ284 Datasheet
