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YSS922 Datasheet PDF

YAMAHA YSS922

YSS922 is one chip LSI consisting of three built-in blocks : Dolby Digital (AC-3) / Pro Logic & DTS decoder (Main DSP), a programmable sound processing DSP (Sub DSP) and SPDIF receiver (DIR) which can handle up to The Sub DSP is capable of realizing various sound fields, such as virtual surround by down-loading the program and coefficient from outside. The clock output can be controlled with various modes determined by register setting.
Part No. YSS922
Datasheet YSS922 Download
Manufacturer
YAMAHA
Description 96kHz DIR + Dolby Digital / Pro Logic / DTS decoder + Sub DSP
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YSS922 datasheet page 1 preview

FEATURES

DIR Block
● Sampling frequency: two ranges are available including; 32k to 48kHz (normal rate) and 64k to 96kHz (double rate)
● Provides master clock, 256fs, to DAC, ADC and other peripheral devices.
● Has a pin that indicates the double rate operation.
● Every channel status and user data can be read through the microprocessor interface.
● Has an output pin for interrupt that is activated by changing of the status information.
● Internal operation frequency: 25MHz Main DSP Block
● Dolby Digital (AC-3) / Pro Logic and DTS decode
● High quality internal 24 bit DSP
● No external memory is required. (Memory for center and surround channel delay is included.)
● AC-3 Karaoke mode.
● Supports compression modes at AC-3 / DTS decoding.
● Pro Logic decoding for Dolby Digital 2 channels decoded signal as well as ordinary PCM signal.
● Reads Dolby Digital / DTS decode information through the microprocessor interface.
● Included de-emphasis filter for the PCM signal.
● Internal operation...
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