Datasheet4U Logo Datasheet4U.com

NJ88C22 - Frequency Synthesiser with resettable counters

Description

Pin no.

Description Analog output from the sample and hold phase comparator for use as a ‘fine’ error signal.

Voltage increases as fv (the output from the ‘M’ counter) phase lead increases; voltage decreases as fr (the output from the reference counter) phase lead increases.

Features

  • s Low Power Consumption MP18 Fig.1 Pin connections - top view (not to scale) s s s s High Performance Sample and Hold Phase Detector Serial Input with Fast Update Feature >20MHz Input Frequency Fast Lock-up Time.

📥 Download Datasheet

Datasheet preview – NJ88C22

Datasheet Details

Part number NJ88C22
Manufacturer Zarlink Inc
File Size 217.02 KB
Description Frequency Synthesiser with resettable counters
Datasheet download datasheet NJ88C22 Datasheet
Additional preview pages of the NJ88C22 datasheet.

📁 Similar Datasheet

  • NJ88C33 - Frequency Synthesiser (I2C BUS Programmable) (Mitel Networks Corporation)
  • NJ88C33 - Frequency Synthesiser (Zarlink Semiconductor)
  • NJ88C50 - Dual Low Power Frequency Synthesiser (Mitel Networks Corporation)
  • NJ88C50 - Dual Low Power Frequency Synthesiser (Zarlink Semiconductor)
  • NJ8811 - Control Circuit for Frequency Synthesis (GEC Plessey Semiconductors)
  • NJ8812 - Control Circuit for Frequency Synthesis (GEC Plessey Semiconductors)
  • NJ8821 - FREQUENCY SYNTHESISER (General Electric Company)
Other Datasheets by Zarlink Inc
  • NJ88C30 - VHF SYNTHESISER
  • NJ8820 - FREQUENCY SYNTHESISER (PROM INTERFACE)
  • NJ8821 - FREQUENCY SYNTHESISER (MICROPROCESSOR INTERFACE) WITH RESETTABLE COUNTERS

Full PDF Text Transcription

Click to expand full text
NJ88C22 Frequency Synthesiser with resettable counters DS2439 - 2.2 The NJ88C22 is a synthesiser circuit fabricated on the GPS CMOS process and is capable of achieving high sideband attenuation and low noise performance. It contains a reference oscillator, 11-bit programmable reference divider, digital and sample-and-hold comparators, 10-bit programmable ‘M’ counter, 7-bit programmable ‘A’ counter and the necessary control and latch circuitry for accepting and latching the input data. Data is presented serially under external control from a suitable microprocessor. Although 28 bits of data are initially required to program all counters, subsequent updating can be abbreviated to 17 bits, when only the ‘A’ and ‘M’ counters require changing.
Published: |