MA3864 Datasheet | Zarlink Semiconductor

.. Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink./obsolete_products/ .. MA3864 AUGUST 1993 ADVANCE DATA DS3832-2.1 RADIATION HARD 8192 x 8 BIT MASK-PROGRAMMABLE ROM The MA3864 64k Mask Programmable ROM is configured as 8192x8 bits and manufactured using CMOS-SOS high performance, radiation hard, 1.5µm technology. The design has full static operation with no clock or timing strobe required. Address input buffers are deselected when chip select is in the HIGH state. Programming is performed during fabrication by customising the penultimate layer of the process. Programming data may be supplied in EPROM or as a data file in the standard INTEL Hex format. Operation Mode Read Output Disable Standby - E L L H X G L H X X I/O D OUT High Z High Z X ISB 2 Power Features s 1.5µm CMOS-SOS Technology s Latch-up Free s Fast Access Time 60ns Typical s Total Dose 106 Rad(Si) s Transient Upset >1011 Rad(Si)/sec s SEU 4.3 x 10-11 Errors/bitday s Single 5V Supply s Three State Output s Low Standby Current 100µA Typical s -55°C to +125°C Operation s All Inputs and Outputs Fully TTL or CMOS patible s Fully Static Operation s Programmable at Via Level for Fast Turnaround s 4 Mask Programmable Chip Selects - E is a mask programmed NAND function of E1,E2,E3,E4 and their inverses. Figure 1: Truth Table Figure 2: Block Diagram .. SIGNAL DEFINITIONS A0-12 Address input pins which select a particular eight bit word within the memory array. Q0-7 Data output pins E1, E2, E3, E4 Are mask programmed, to the customer’s specification, to form the active LOW chip select function (E). E is driven by a 4-input NAND gate which has E1,E2,E3,E4 or their inverses as it’s inputs. Unused NAND gate I/Ps will be tied high internally. When chip select...