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ZL30111 Datasheet Pots Line Card Pll

Manufacturer: Zarlink Semiconductor

Overview: www.DataSheet4U.com ZL30111 POTS Line Card PLL Data Sheet.

General Description

The ZL30111 POTS line card PLL contains a digital phase-locked loop (DPLL), which provides timing and synchronization for SLIC/CODEC devices.

The ZL30111 generates TDM clock and framing signals that are phase locked to the input reference.

It helps ensure system reliability by monitoring its reference for stability and by maintaining stable output clocks during short periods when the reference is unavailable.

Key Features

  • Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 19.44 MHz input Provides a range of clock outputs: 2.048 MHz, 4.096 MHz and 8.192 MHz Provides 2 styles of 8 kHz framing pulses Automatic entry and exit from freerun mode on reference fail Provides DPLL lock and reference fail indication DPLL bandwidth of 922 Hz for all rates of input reference and 58 Hz for an 8 kHz input reference Less than 0.6 nspp intrinsic.

More Datasheets from Zarlink Semiconductor

Part Number Description
ZL30110 Telecom Rate Conversion DPLL
ZL30112 SLIC/CODEC DPLL
ZL30116 SONET/SDH Low Jitter System Synchronizer
ZL30117 SONET/SDH Low Jitter Line Card Synchronizer
ZL30119 Low Jitter Line Card Synchronizer
ZL30102 T1/E1 Stratum 4/4E Redundant System Clock Synchronizer
ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer
ZL30107 GbE Line Card Synchronizer
ZL30108 SONET/SDH Network Interface DPLL
ZL30109 DS1/E1 System Synchronizer

ZL30111 Distributor