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ZVP4105A - P-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET

Key Features

  • 50 Volt VDS.
  • RDS(on)=10Ω.
  • Low threshold ZVP4105A D G S.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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P-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET ISSUE 2 – MARCH 94 FEATURES * 50 Volt VDS * RDS(on)=10Ω * Low threshold ZVP4105A D G S ABSOLUTE MAXIMUM RATINGS. PARAMETER Drain-Source Voltage Continuous Drain Current at Tamb=25°C Pulsed Drain Current Gate Source Voltage Power Dissipation at Tamb=25°C Operating and Storage Temperature Range SYMBOL VDS ID IDM VGS Ptot Tj:Tstg -50 E-Line TO92 Compatible VALUE -175 -520 ± 20 UNIT V mA mA V mW °C 625 -55 to +150 ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated). PARAMETER SYMBOL MIN. BVDSS VGS(th) IGSS IDSS -50 -0.8 -2.0 10 -15 -60 -100 10 50 40 15 6 10 10 18 25 MAX. UNIT CONDITIONS. V V nA µA µA Ω Drain-Source Breakdown Voltage Gate-Source Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current ID=-0.