Datasheet Summary
Zilog
P R E L I M I N A R Y
Z80182/Z8L182 ZILOG INTELLIGENT PERIPHERAL
P RELIMINARY P RODUCT S PECIFICATION
Z80182/Z8L182
ZILOG INTELLIGENT PERIPHERAL CONTROLLER (ZIP™)
Features s
Z8S180 MPU
- Code patible with Zilog Z80®/Z180™ CPU
- Extended Instructions
- Operating Frequency: 33 MHz/5V or 20 MHz/3.3V
- Two DMA Channels
- On-Chip Wait State Generators
- Two UART Channels
- Two 16-Bit Timer Counters
- On-Chip Interrupt Controller
- On-Chip Clock Oscillator/Generator
- Clocked Serial I/O Port
- Fully Static
- Low EMI Option s s s
Two ESCC™ Channels with 32-Bit CRC Three 8-Bit Parallel I/O Ports 16550 patible MIMIC Interface for Direct Connection to PC, XT, AT Bus 100-Pin...