Zilog Z8F4821
High Performance 8-Bit Microcontrollers
DESCRIPTION
Page 26 Corrected IPU Units value in DC Characteristics table to µA from incorrect mA. 203 25 Added footnote to Z8 Encore! XP F64xx Series Ordering Matrix table spe- 287 cific to 64-pin LQFP packages. 24 Restored 40-pin PDIP package to Signal and Pin Descriptions and Packag- 7, 286 ing chapters. 23 Corrected formatting of IDDS section, Table 107; corrected language in the 202, 248 General Purpose RAM section of Appendix A; 22 Revised Flash Sector Protect Register description; revised Packaging 178, 286 chapter. 21 Changed title to Z8 Encore! XP F64xx Series. All 20 Changed Z8 Encore! XP 64K Series Flash Microcontrollers to Z8 Encore! 287, 234 XP F64xx Series Flash Microcontrollers. Deleted three sentences that mentioned Z8R642. Removed the 40 PDIP package. Added ZENETSC0100ZACG to the end of the Ordering Information table. Changed the flag status to unaffected for BIT, BSET, and BCLR in the eZ8 CPU Instruction Summary table. 19 Updated Zilog logo, Disclaimer section, and implemented style guide.