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M484M1644 Datasheet PDF

eorex M484M1644

The EM484M1644VTA, is Synchronous Dynamic Random Access Memory (SDRAM) organized as 1,048,576 words x 4 banks x 16 bits. The 64Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 3.3V low power memory system.
Part No. M484M1644
Datasheet M484M1644 Download
Manufacturer eorex
Description 64Mb SDRAM
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M484M1644 datasheet page 1 preview

DESCRIPTION

All inputs and outputs are synchronized with the positive edge of the clock. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are compatible with LVTTL . Feature
● Fully
● Single synchronous to positive clock edge 3.3V +/- 0.3V power supply
● LVTTL compatible with multiplexed address
● Programmable Burst Length (B/ L) - 1,2,4,8 or full page
● Programmable CAS Latency (C/ L) - 2 or 3
● Data Mask (DQM) for Read / Write masking
● Programmable wrap sequence - Sequential ( B/ L = 1/2/4/8/full page ) - Interleave ( B/ L = 1/2/4/8 )
● Burst read with single-bit write operation
● All inputs are sampled at the rising edge of the system clock.
● Auto refresh and self refresh
● 4,096 refresh cycles / 64ms * EOREX reserves the right to change products or specification without notice. Rev.02 2/18 64Mb SDRAM Pin Assignment ( Top View ) x16 VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 VDD LDQM /WE /CAS /RAS /CS BA0 BA1 A10/AP A0...
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