54AC11534 Datasheet | Texas Instruments

54AC11534, 74AC11534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS037A - JULY 1987 - REVISED APRIL 1993 - Eight D-Type Flip-Flops in a Single Package - 3-State Bus Driving Inverting Outputs - Full Parallel Access for Loading - Inputs Are TTL-Voltage patible - Flow-Through Architecture to Optimize PCB Layout - Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise t- EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process - 500-m A Typical Latch-Up Immunity at 125°C - Package Options Include Plastic Small- Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description 54AC11534 . . . JT PACKAGE 74AC11534 . . . DW OR NT PACKAGE (TOP VIEW) 1Q 2Q 3Q 4Q GND GND GND GND 5Q 6Q 7Q 8Q 1 2 3 4 5 6 7 8 9 10 11 12 24 OC 23 1D 22 2D 21 3D 20 4D 19 VCC 18 VCC 17 5D 16 6D 15 7D 14 8D 13 CLK 54AC11534 . . . FK PACKAGE (TOP VIEW) 3D 4D VCC NC VCC 5D 6D These eight flip-flops feature 3-state outputs designed for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops of the ′AC11534 are edgetriggered, D-type flip-flops. On the positive transition of the clock, the Q outputs are set to the plement of the logic levels at the D inputs. The ′AC11534 is functionally equivalent to the ′AC11374 except for having inverted outputs. An output-control input (OC) is used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance third state and increased drive provide the capability to drive the bus lines in a bus-organized system without need for interface or pull-up ponents. The output control (OC) does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The 54AC11534 is...