Datasheet Summary
54ACT16241, 74ACT16241 16ĆBIT BUFFERS/DRIVERS
WITH 3ĆSTATE OUTPUTS
SCAS189A
- MARCH 1990
- REVISED APRIL 1996
D Members of the Texas Instruments
Widebus Family
D Inputs Are TTL-Voltage patible D 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
D Flow-Through Architecture Optimizes
PCB Layout
D Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center...