Datasheet Summary
SN54ACT16374, 74ACT16374
16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SCAS124B
- MARCH 1990
- REVISED APRIL 1996
D Members of the Texas Instruments
Widebust Family
D Inputs Are TTL-Voltage patible D 3-State Bus-Driving True Outputs D Flow-Through Architecture Optimizes
PCB Layout
D Distributed Center-Pin VCC and GND
Configurations Minimize High-Speed Switching Noise
D EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin...