54ACT16620 Datasheet | Texas Instruments

54ACT16620, 74ACT16620 16ĆBIT BUS TRANSCEIVERS WITH 3ĆSTATE OUTPUTS SCAS184A - JUNE 1990 - REVISED APRIL 1996 D Members of the Texas Instruments Widebus  Family D Inputs Are TTL-Voltage patible D Inverting Logic D Flow-Through Architecture Optimizes PCB Layout D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D EPIC  (Enhanced-Performance Implanted CMOS) 1-µm Process D 500-m A Typical Latch-Up Immunity at 125°C D Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings description The ’ACT16620 are inverting 16-bit transceivers designed for asynchronous munication between data buses. The control-function implementation allows for maximum flexibility in timing. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the output-enable (OEAB or OEBA) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated. 54ACT16620 . . . WD PACKAGE 74ACT16620 . . . DL PACKAGE (TOP VIEW) 1OEAB 1B1 1B2 GND 1B3 1B4 VCC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 VCC 2B5 2B6 GND 2B7 2B8 2OEAB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 1OEBA 47 1A1 46 1A2 45 GND 44 1A3 43 1A4 42 VCC 41 1A5 40 1A6 39 GND 38 1A7 37 1A8 36 2A1 35 2A2 34 GND 33 2A3 32 2A4 31 VCC 30 2A5 29 2A6 28 GND 27 2A7 26 2A8 25 2OEBA The dual-enable configuration gives the transceiver the capability to store data by simultaneously enabling OEAB and OEBA. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, the bus lines remain at their last states. The 74ACT16620 is packaged...