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54HC10 - Triple 3-Input NAND Gates

General Description

This device contains three independent 3-input NAND gates.

B

C in positive logic.

Key Features

  • Buffered inputs.
  • Wide operating voltage range: 2 V to 6 V.
  • Wide operating temperature range: -55°C to +125°C.
  • Supports fanout up to 10 LSTTL loads.
  • Significant power reduction compared to LSTTL logic ICs 2.

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Other Datasheets by Texas Instruments

Part Number Description
54HC109 Dual J-K Positive-Edge-Triggered Flip-Flops
54HC11 Triple 3-Input AND Gate
54HC112 Dual J-K Negative-Edge-Triggered Flip-Flops
54HC125 Quadruple Buffers
54HC132 Quadruple 2-Input NAND Gates

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CD74HC10, CD54HC10 SCHS128D – AUGUST 1997 – REVISED JULY 2021 CDx4HC10 Triple 3-Input NAND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Alarm / tamper detect circuit • S-R latch 1A 1 1B 2 2A 3 2B 4 2C 5 2Y 6 GND 7 3 Description This device contains three independent 3-input NAND gates. Each gate performs the Boolean function Y = A ● B ● C in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) CD74HC10M SOIC (14) 8.70 mm × 3.90 mm CD74HC10E PDIP (14) 19.30 mm × 6.40 mm CD54HC10F CDIP (14) 21.30 mm × 7.