Texas Instruments 74AC11132
The 74AC11132 is characterized for operation from – 40°C to 85°C.| Part No. | 74AC11132 |
|---|---|
| Datasheet | 74AC11132 Download |
| Manufacturer |  Texas Instruments |
| Description | QUADRUPLE 2-INPUT POSITIVE-NAND SCHMITT-TRIGGER |
| Buy | Stock & Price |
74AC11132 QUADRUPLE 2-INPUT POSITIVE-NAND SCHMITT-TRIGGER
● Operation From Very Slow Input Transitions
● Temperature-Compensated Threshold Levels
● High Noise Immunity
● Flow-Through Architecture Optimizes PCB Layout
● Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
● EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process
● 500-mA Typical Latch-Up Immunity at 125°C
● Package Options Include Both Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs SCAS113 – D3482, MARCH 1990 – REVISED APRIL 1993 D OR N PACKAGE (TOP VIEW) 1A 1Y 2Y GND GND 3Y 4Y 4B 1 2 3 4 5 6 7 8 16 1B 15 2A 14 2B 13 VCC 12 VCC 11 3A 10 3B 9 4A description Each circuit functions as a NAND gate, but because of the Schmitt action, it has different input threshold levels for positive- and negative-going signals. It performs the Boolean function Y = ASB or Y = A+B in positive logic. These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals.
● Operation From Very Slow Input Transitions
● Temperature-Compensated Threshold Levels
● High Noise Immunity
● Flow-Through Architecture Optimizes PCB Layout
● Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
● EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process
● 500-mA Typical Latch-Up Immunity at 125°C
● Package Options Include Both Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs SCAS113 – D3482, MARCH 1990 – REVISED APRIL 1993 D OR N PACKAGE (TOP VIEW) 1A 1Y 2Y GND GND 3Y 4Y 4B 1 2 3 4 5 6 7 8 16 1B 15 2A 14 2B 13 VCC 12 VCC 11 3A 10 3B 9 4A description Each circuit functions as a NAND gate, but because of the Schmitt action, it has different input threshold levels for positive- and negative-going signals. It performs the Boolean function Y = ASB or Y = A+B in positive logic. These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals.
