Texas Instruments 74AC11160
the 74AC11160 is synchronous and a low level at the clear input sets all four of the flip-flops outputs low, regardless of the levels of the clock, load, or enable inputs. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Both count-enable inputs (ENP and ENT) must be high to count, and ENT is fed forward to enable the ripple carry output (RCO).74AC11160 SYNCHRONOUS 4-BIT DECADE COUNTER
● Internal Look-Ahead for Fast Counting
● Carry Output for n-Bit Cascading
● Fully Synchronous Operation for Counting
● Flow-Through Architecture to Optimize PCB Layout
● Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
● EPIC ™ (Enhanced-Performance Implanted CMOS) 1-µm Process
● 500-mA Typical Latch-Up Immunity at 125°C
● Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs SCAS380 – D3199, AUGUST 1988 – REVISED APRIL 1993 DW OR N PACKAGE (TOP VIEW) RCO QA QB GND GND GND GND QC QD LOAD 1 2 3 4 5 6 7 8 9 10 20 CLR 19 CLK 18 A 17 B 16 VCC 15 VCC 14 C 13 D 12 ENP 11 ENT description This synchronous, presettable 4-bit decade counter features an internal carry look-ahead circuitry for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable inputs and internal gating.
● Internal Look-Ahead for Fast Counting
● Carry Output for n-Bit Cascading
● Fully Synchronous Operation for Counting
● Flow-Through Architecture to Optimize PCB Layout
● Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
● EPIC ™ (Enhanced-Performance Implanted CMOS) 1-µm Process
● 500-mA Typical Latch-Up Immunity at 125°C
● Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs SCAS380 – D3199, AUGUST 1988 – REVISED APRIL 1993 DW OR N PACKAGE (TOP VIEW) RCO QA QB GND GND GND GND QC QD LOAD 1 2 3 4 5 6 7 8 9 10 20 CLR 19 CLK 18 A 17 B 16 VCC 15 VCC 14 C 13 D 12 ENP 11 ENT description This synchronous, presettable 4-bit decade counter features an internal carry look-ahead circuitry for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable inputs and internal gating.